This invention relates generally to digital signal processing and in particular aspects to architectures for digital signal processors.
Digital signal processors generally modify or analyze information measured as discrete sequences of numbers. Digital signal processors are used for a wide variety of signal processing applications such as television, multimedia, audio, digital image processing and telephony as examples. Most of these applications involve a certain amount of mathematical manipulation, usually multiplying and adding signals.
A large number of digital signal processors are available from a large number of vendors. Generally, each of these processors is fixed in the sense that it comes with certain capabilities. Users attempt to acquire those processors which best fit their needs and budget. However, the user's ability to modify the overall architecture of the digital signal processor is relatively limited. Thus, these products are packaged as units having fixed and immutable sets of capabilities.
In a number of cases, it would be desirable to have the ability to create a digital signal processor that performs complex functions that are specifically adapted to particular problems to be solved. Thus, it would be desirable that the hardware and software of the digital signal processor be adapted to a particular function. However, such a digital signal processor might enjoy a relatively limited market. Given the investment in silicon processing, it may not be feasible to provide a digital signal processor, which has been designed to meet relatively specific needs. However, such a device would be highly desirable. It would provide the greatest performance for the expense incurred, since only those features that are needed are provided. Moreover, those features may be provided that result in the highest performance without unduly increasing cost.
Multiprocessing digital signal processors or media processors generally use a hierarchical or a peer-to-peer processor array. The timing between instructions and data is invariable, known and fixed in hardware. The assembler or programmer uses the delay information to ensure that timing dependencies are met. When new processing elements are added to the overall architecture, they tend to require that preexisting code be rewritten. Moreover, the software that runs the digital signal processor is dependent on hardware timing and thus is not portable across different silicon process technologies. Binary or assembly code written on one version of these processors may not be portable to other versions that have different processing elements.
These architectures may also use a master control processor that does not contribute to the data processing work because it is busy directing the slave processors. The assembler or programmer is involved in predicting the clock-to-clock timing dependencies on variables stored in memories.
Thus, there is a need for digital signal processors that are adaptable to the addition of new processing elements, independent of hardware timing, more communication efficient or less timing dependent.